1. Field of the Invention
This invention generally relates to an electrical programmable event timer and, more particularly, to a timer capable of servicing timer channels with a fixed interval periodicity.
2. Description of the Related Art
Programmable timers are widely used in the data processing and machine control fields. Some of the common tasks performed by most timers include input capture and output compare. An input capture function records (“captures”) the time at which an external event (electrical signal) occurs. For example, input capture may be used to read a limit switch or a temperature. An output compare function generates an output signal in response to programmed time intervals. For example, output compare can be used to run an electrical motor or solenoid. Input capture and output compare functions can be modified in response to commands from an associated programmable logic controller (PLC), programmable controller (PC), or microprocessor, and they may also be used to trigger interrupts in the PC program.
From these relatively simple functions, more complex operations such as pulse width modulation (PWM) can be performed using multiple cooperating channels, to operate a motor for example. A predetermined pulse width can be represented as a digital value, stored in a first timer channel register, and used to perform the pulse width modulation function. A second timer channel register can be used to store a first period value—the period of the pulse width. Likewise, a third timer channel register can be used to store a second (shorter) period value, which can be used to make the pulse width narrower, if feedback signals dictate that such an action is necessary.
The use of such dedicated circuitry insures that pulses are generated with the necessary pulse width, with a minimum of latency, if the pulse width must be made longer or shorter. In addition to the use of the above-mentioned master registers, each channel conventionally must further include an additional slave channel that is loaded with data to be used in a subsequent timer operation. While this system is simple to implement, it uses significant hardware resources. Further, the system induces latency with memory access and the shuffling of data between multiple stages of buffering.
A timer can perform at greater number of operations, more smoothly, with the assistance of an associated microprocessor. Using the master and slave registers presented above, the timer uses simple state logic to load the next data word from the slave register into the master register for a two-step operation, when the timed events are responding “normally”. However, in the event of an abnormal situation, the microprocessor can directly load a word into the master register, from memory, that is more appropriate for the situation. For the sake of increased flexibility, some timer designs have opted to have all channel service operations performed in response to execution of microprocessor/software instructions. While the use of the microprocessor adds flexible, it does so at the cost of system resources. Generally, the microprocessor is responsible for other functions besides servicing the timer channels. Further, the latency associated with microprocessors and software instructions is much greater than hardware logic operations. Even more critical, the cost of designing the software to run a microprocessor-based timer can be very high. If there are a large number of timers to be programmed, for use in a production line for example, the average cost of the timer may be tolerable. But for custom control systems, the cost of a microprocessor-based timer may be prohibitive.
It would be advantageous if a programmable timer channel could be designed to function with a single register, in conjunction with data and control instructions stored in random access memory (RAM).
It would be advantageous if a timer channel could be updated automatically with data words, without the intervention of microprocessor-driven software instructions.